In PowerStack, TI's NexFET power MOSFETs are stacked on a grounded leadframe. Copper clip bonds connect the I/O voltage pins. The packaging technology enables heightened integration in a quad flat-pack no-lead (QFN) form factor. This 3D packaging cuts down on package area by as much as 50% (compared to side-by-side MOSFETs). The package's thermal performance, current carrying capability, and effeciency are supported by this design.
PowerStack is in volume production at TI's Clark facility, which is the company's newest semiconductor assembly and test facility (Philippines). TI will expand capacity for advanced packaging at Clark in 2011, "nearly doubling initial capacity," added Bing Viera, managing director of TI Philippines.
The company is targeting PowerStack for computing and telecommunications applications that must handle higher loads, from "broadband mobile video and 4G communications...and take up less space," said Matt Romig, analog packaging at TI.
